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1. Start with requirements, not parts

Before browsing SMPS designs or copying a random circuit diagram library entry, define a short specification:

• Input range (e.g. 90–264 VAC, 9–36 VDC, 48 V telecom bus)
• Output voltage(s) and tolerance (e.g. 5 V ±3 %, 12 V ±2 %)
• Maximum continuous current and peak current
• Efficiency target (e.g. > 90 % at nominal load)
• Isolation yes/no and required safety standard
• Allowed ripple/noise on output
• EMC class (CISPR 22/32 Class A/B, industrial/consumer)

This drives topology, controller type, magnetics, and even board stackup.

2. Choosing the right topology

For most practical SMPS designs, the mainstream choices are:

• Buck converter – step-down DC/DC (e.g. 24 V → 5 V, 12 V → 1.2 V)
• Boost converter – step-up (e.g. 5 V → 24 V)
• Flyback converter – isolated low–medium power AC/DC or DC/DC
• Forward / half-bridge / full-bridge – higher power isolated SMPS
• LLC resonant converter – high efficiency in PFC + DC/DC stages

For 5–50 W isolated AC/DC, a flyback is often the simplest. For non-isolated point-of-load rails on a digital board, synchronous buck remains the default choice.

3. AC/DC converter schematic – a practical view

A typical isolated offline SMPS can be mentally split into blocks:

• EMI input filter and inrush limitation
• Rectifier and bulk capacitor
• Primary-side switch (MOSFET) and transformer
• Secondary rectification (diode or synchronous rectifier)
• Output filtering (LC and RC networks)
• Feedback and control (optocoupler or primary-side regulation)

Reading an AC/DC converter schematic with this block view makes datasheet designs much more understandable.

4. Power MOSFET selection

Power MOSFET selection is a core part of any SMPS design guide. There is no single “best MOSFET”; you trade off:

• Voltage rating (V_DS) with safety margin (e.g. 600–650 V for 230 VAC flyback)
• R_DS(on) vs. cost and package size
• Gate charge (Qg) and Miller charge (Q_gd) for switching losses
• Package thermal resistance and mounting (TO-220, DPAK, LFPAK, PowerSO)

For low-voltage synchronous buck, Qg and Q_gd dominate; for offline primary FETs, avalanche rating and ruggedness matter as well.

5. Gate driver reference

For anything beyond a few kHz and a few amps, you need a gate driver reference, not bare MCU GPIO. Typical patterns:

• Low-side drivers for synchronous buck stages
• Half-bridge drivers (high-side + low-side) for bridge and synchronous topologies
• Integrated controllers with built-in gate drivers for flyback/forward

Key driver parameters:

• Peak source/sink current (e.g. 2–4 A for mid-power designs)
• Propagation delay and matching (in half-bridge SMPS designs)
• UVLO thresholds (so the driver never half-opens MOSFET gates)

6. Magnetics: transformer and inductor basics

Good power electronics circuits need sane magnetics. Full magnetics design is a book on its own, но минимум:

• Choose core material and shape according to frequency and power
• Respect maximum flux density to avoid saturation at worst-case conditions
• Keep leakage inductance under control for flyback and forward
• Consider skin and proximity effects at higher switching frequencies

Many vendors provide transformer design tools and reference designs — use them as starting points.

7. Compensation and stability (without heavy math)

Most modern controllers include example compensation networks in their datasheets. Use them as a starting point, but don’t blindly copy:

• Check output LC values vs. datasheet “typical design”
• Keep feedback wiring short and low-noise
• Adjust compensation only after layout is close to final

If you have a Bode plotter or frequency-response analyzer, measure loop gain in real hardware. If нет — смотри на поведение при ступенчатых нагрузках и скачках входного напряжения.

8. PCB design rules for SMPS

Many PCB design rules for digital boards do not directly apply to SMPS. Для SMPS важнее:

• Define and minimize high dI/dt current loops (input, switch, output)
• Use short, wide traces for power paths; consider copper pours
• Guard critical nodes (FB, COMP, reference) from SW noise
• Place MLCC input caps directly between VIN and PGND at the FET or IC pins
• Use continuous ground planes where possible (inner layers)

Combining this article with the High-Current Buck Converter Layout Guide gives a solid starting point for clean SMPS layouts.

9. EMI/EMC PCB considerations

Passing EMC is often harder than making the converter function at all. For EMI/EMC PCB design:

• Keep the “switch node” copper small and localized
• Avoid routing digital or analog signals over or under SW
• Add RC snubbers or damping networks where needed
• Provide a clear path for common-mode currents (Y-caps, shielding)
• Use proper common-mode chokes and X/Y capacitors in AC input filters

Many SMPS designs that “almost pass” EMC can be fixed by small layout tweaks plus an additional common-mode choke.

10. Measurement: oscilloscope basics for SMPS

Without correct probing, даже лучший осциллограф покажет мусор. Минимум:

• Use the shortest possible ground connection (spring or loop) on the probe
• Measure SW node and gate with ×10 probes and proper bandwidth
• Use a current probe or shunt + differential amplifier for precise inductor current
• When checking ripple, use AC-coupling and minimize loop area at the test point

These oscilloscope basics avoid false ringing and phantom overshoot that come purely from bad measurement setup.

11. Thermal and mechanical aspects

SMPS is not only a schematic; it is also a thermal and mechanical system:

• Use thermal vias under hot components (MOSFETs, diodes, transformers)
• Plan airflow direction and keep the hottest parts in the flow
• Keep electrolytic capacitors away from the hottest hotspots
• Allow enough creepage and clearance in offline designs

Check datasheets and safety standards for minimum distances, especially around primary/secondary isolation.

12. Typical SMPS debug checklist

• Verify startup and shutdown behavior over full input range
• Measure output ripple at minimum and maximum load
• Apply load steps (e.g. 10 % ↔ 90 %) and observe transient response
• Check MOSFET and diode temperatures at worst-case ambient
• Inspect gate waveforms for overshoot and ringing
• Test no-load and light-load behavior (burst mode, audible noise)

13. Conclusion

A good SMPS design guide is not a collection of magic numbers, but a set of habits: think in terms of energy flow, current loops, parasitics, and measurement reality.

Combine careful power MOSFET selection, sane gate driver reference, realistic magnetics, and disciplined PCB design rules and EMI/EMC PCB layout – и большая часть проблем исчезнет ещё до первого включения в сеть.