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1. Define the application and stress conditions

Before opening any datasheet, clearly define:

• Topology: buck / boost / flyback / half-bridge / full-bridge / motor H-bridge
• DC bus voltage and transients (min/nominal/max)
• Maximum load current and overload conditions
• Switching frequency and control method (PWM, synchronous rectification)
• Ambient temperature and cooling method (natural convection, forced air, heatsink)

These parameters drive all subsequent decisions for voltage rating, current rating, R_DS(on), package and thermal path.

2. Voltage rating: margin over bus and transients

The MOSFET’s drain-source voltage rating V_DSS must exceed the worst-case voltage plus ringing and surges. Typical guidelines:

• For 12–24 V systems: use 30–60 V MOSFETs
• For 48 V systems: 80–100 V MOSFETs
• For off-line PFC / AC/DC: 600–900 V MOSFETs or SiC devices

Always consider:

• Drain overshoot due to leakage inductance and wiring
• Input surges (automotive load dump, lightning, etc.)
• Regulatory tests that may stress insulation and clearances

3. Current rating, RDS(on) and conduction losses

MOSFET current ratings in datasheets are often optimistic (based on ideal cooling). Instead of relying solely on I_D (continuous drain current), estimate conduction losses from R_DS(on):

P_cond ≈ I_RMS² · R_DS(on)(T_J)

Note that R_DS(on) increases with junction temperature. Check curves for R_DS(on) vs. T_J and derate accordingly.

For motor drivers, root-mean-square current and stall conditions must be considered. High start-up currents or braking energy can cause short but intense thermal peaks.

4. Gate charge, switching losses and speed

Gate charge Q_G determines how much current the driver must source/sink to switch the MOSFET at a given speed:

I_G(avg) ≈ Q_G · f_SW

Higher switching frequency and faster transitions reduce switching loss, but increase EMI. Look at:

• Total gate charge Q_G
• Gate charge at Miller plateau Q_GD
• Typical turn-on/turn-off energy E_ON and E_OFF

For high-frequency SMPS, a device with lower Q_G can significantly reduce switching losses, even if its R_DS(on) is slightly higher. For low-frequency motor PWM, conduction losses often dominate.

5. SOA (Safe Operating Area) and avalanche ruggedness

The Safe Operating Area graph shows limits for combinations of voltage, current and time where the MOSFET can operate safely without secondary breakdown.

Check:

• DC SOA region for start-up and fault conditions
• Pulse SOA for inrush, short circuits, demagnetization pulses
• Avalanche energy rating E_AS for inductive loads

Motor drivers and flyback converters especially can stress avalanche and SOA. If possible, use external snubbers, TVS diodes or clamp networks to limit stress.

6. Package, thermal resistance and mounting

Package choice directly affects thermal performance and layout:

• Through-hole (TO-220, TO-247) — easy to heatsink, larger inductance
• SMD (DPAK, D2PAK, PowerSO, LFPAK, PDFN, etc.) — compact, lower parasitic inductance
• Power packages with exposed pads for direct PCB heat spreading

Key parameters:

• R_θJC — junction-to-case thermal resistance
• R_θJA — junction-to-ambient (depends heavily on PCB and airflow)
• Maximum T_J (e.g., 150 °C or 175 °C)

Use thermal calculations to ensure the junction remains below limit at worst-case power dissipation and ambient. Combine with realistic R_DS(on)(T_J) and P_SW.

7. Parasitics, layout and gate drive

At high dI/dt and dV/dt, parasitic inductances and capacitances can dominate behavior:

• Keep source and drain connections short and wide
• Use Kelvin source pins where available (source-sense pin for clean gate return)
• Minimize loop areas for power and gate circuits
• Place gate driver close to MOSFET, with dedicated gate return path

These rules tie directly into EMI, ringing and MOSFET stress, as covered in the other articles of this series.

8. Quick selection checklist

• V_DSS rating with sufficient margin over maximum bus and overshoot
• R_DS(on) low enough for conduction loss target at hot temperature
• Gate charge compatible with driver and switching frequency
• SOA and avalanche ratings adequate for inrush, short and inductive events
• Package and thermal resistance match cooling method
• Parasitic-friendly package for high dI/dt / dV/dt layouts

9. Conclusion

Choosing a power MOSFET is more than “pick the lowest R_DS(on) and highest current”. A realistic look at voltage, current, switching behavior, SOA and thermals is required for robust SMPS and motor drivers. With a structured checklist and a few bench experiments, you can converge on devices that survive in the field instead of only in simulation.