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1. Key concepts: what a good stackup must provide

• Solid reference planes for high-speed and sensitive signals
• Short return paths under traces (controlled impedance)
• Low loop inductance for SMPS and power stages
• Predictable FR-4 material properties for timing and impedance
• Thermal paths from hot parts into inner copper and heatsinks

Most of this comes from one decision: how you order copper and dielectric layers.

2. Basic FR-4 material properties (for quick estimates)

Numbers vary by manufacturer, but for back-of-the-envelope calculations you can assume:

Parameter	Typical value	Comment
Dielectric constant (Dk)	≈ 4.0–4.5	Lower Dk for high-speed laminates
Loss tangent (Df)	0.015–0.02	Critical for multi-GHz signals
Copper thickness	0.5–1 oz inner, 1 oz outer	Power boards may use 2–3 oz
Standard core thickness	0.1–0.3 mm	Used between inner layers
Prepreg thickness	0.08–0.2 mm	Allows impedance tuning

For impedance-controlled stackups, your PCB manufacturer should provide a detailed stackup table with exact Dk/Df values and thickness per layer.

3. Classic 4-layer PCB stackup for mixed-signal designs

A very robust 4-layer stackup template for many digital + analog + low/medium power designs:

Layer	Description
Top	Signals + local copper pours for power, sensitive routing
L2	Solid GND plane (reference for Top)
L3	Power plane(s) + slow signals (if needed)
Bottom	Signals (less critical), I/O, “dirty” routing

Key idea: Top traces always see L2 ground as reference, and Bottom traces see L3 (power or split ground) as reference. Avoid splitting L2 unless you know exactly what you are doing.

4. 6-layer stackup for high-speed digital + power

When you have SERDES, DDR, LVDS and serious power stages on the same board, a 6-layer stackup gives more freedom:

Layer	Role
Top (L1)	High-speed signals, critical routes, sensitive analog
L2	Solid GND plane (reference for L1)
L3	Power plane(s), local PWR islands, low-speed control
L4	Additional signals (often high-speed pairs)
L5	Second solid GND plane (reference for L4 and Bottom)
Bottom (L6)	Slow signals, connectors, mechanical

Two ground planes improve return path quality, reduce EMI and allow controlled impedance both on outer and inner signal layers.

5. Power electronics PCB stackup considerations

For power electronics PCB stackups (motor drivers, SMPS, inverters) you often need:

• Thicker copper (2–3 oz) on outer layers for high currents
• Inner ground planes for low-inductance return paths
• Local copper pours for thermal spreading under MOSFETs and rectifiers
• Clear separation between noisy power areas and sensitive control circuits

A typical approach: keep switching nodes and high-current loops on the top layer over a solid ground plane, with heavy copper pours and plenty of thermal vias into inner planes.

6. Impedance-controlled routing and stackup

For high-speed interfaces (USB 2.0/3.x, Ethernet, HDMI, LVDS, DDR) the impedance-controlled stackup must be agreed with the PCB manufacturer:

• Target impedance (e.g. 50 Ω single-ended, 90 Ω or 100 Ω differential)
• Trace width and spacing per layer
• Dielectric thickness and Dk for each signal layer
• Which layer pairs use stripline vs. microstrip routing

Your fab can provide a calculator or a pre-defined stackup where these values are already verified.

7. Via types and their impact on stackup

Multilayer PCB guidelines must also account for via types:

• Through-hole vias – cheapest, but add stubs for high-speed signals
• Blind/buried vias – reduce stubs, cost goes up
• Back-drilled vias – remove stubs on high-speed lines
• Via-in-pad (filled and capped) – great for BGAs and dense routing

For very fast links (multi-Gb/s), via stubs can dominate the signal integrity. Then the stackup, drill stack and back-drill strategy must be designed as one system.

8. Talking to your PCB manufacturer

A good stackup is always a collaboration between designer and fabricator. When requesting quotes:

• Specify number of layers and desired stackup template (4L, 6L, 8L)
• List critical impedances and target interfaces (USB, Ethernet, DDR, HDMI)
• State copper thickness per layer (especially for power boards)
• Ask for their standard PCB stackup reference tables

This avoids surprises like unexpected dielectric thickness, wrong impedance or excessive cost due to exotic material choices.

9. Quick checklist before finalizing Gerbers

• Is there at least one solid ground plane close to each signal layer?
• Are high-speed traces routed over continuous reference planes?
• Are power planes arranged to minimize loop area for SMPS and power stages?
• Is copper thickness adequate for current and thermal dissipation?
• Are impedance requirements documented and agreed with the fab?
• Are via structures acceptable for the fastest interfaces?

10. Conclusion

A robust PCB stackup for high-speed & power is one of the best investments you can make in a board. It improves EMC, reduces field failures, and often makes routing easier instead of harder.

Start from a proven 4- or 6-layer template, adapt it to your power levels and interfaces, and then lock it down with your PCB manufacturer as a shared reference for future designs.